Brendan Gregg

FEBRUARY 28, 2023

Make sure your system can handle next-generation DRAM,” [link] Nov 2011 - [Hruska 12] Joel Hruska, “The future of CPU scaling: Exploring options on the cutting edge,” [link] Feb 2012 - [Gregg 13] Brendan Gregg, “Blazing Performance with Flame Graphs,” [link] 2013 - [Shimpi 13] Anand Lal Shimpi, “Seagate to Ship 5TB HDD in 2014 using Shingled Magnetic (..)

Performance 110

Performance Latency Cache Virtualization 110

ACM Sigarch

FEBRUARY 23, 2018

The rest of the article presents some examples of this behavior and how it impacts our field, whether we care to admit it or not. Present Bias. In Thaler’s book, he uses the term “present bias” to describe how people discount the future and give larger weight or value to decisions that are closer in time. Discounting the Past.

Architecture 47

Architecture Cache Hardware Virtualization 47

CSS - Tricks

JULY 25, 2019

Cache-Headers missing? Lighthouse records metrics from the browser, applies a scoring model to them, and presents an overall performance score. This process works by obtaining mobile 75th and 95th percentiles from HTTP Archive , then applying a log normal function. After that, it’ll be mitigated by cache. In PageSpeed 5.0,

Google 71

Google Engineering Speed Mobile 71

Brendan Gregg

FEBRUARY 28, 2023

Make sure your system can handle next-generation DRAM,” [link] , Nov 2011 [Hruska 12] Joel Hruska, “The future of CPU scaling: Exploring options on the cutting edge,” [link] , Feb 2012 [Gregg 13] Brendan Gregg, “Blazing Performance with Flame Graphs,” [link] , 2013 [Shimpi 13] Anand Lal Shimpi, “Seagate to Ship 5TB HDD in 2014 using Shingled Magnetic (..)

Performance 52

Performance Latency Cache Virtualization 52

The Morning Paper

DECEMBER 1, 2019

Memory might be durable, but… …it is expected that caches and registers will remain volatile. State-of-the-art constructions of durable lock-free sets, denoted Log-Free Data Structures, were recently presented by David et al., Link-free sets. The link-free algorithm adds two validity bits to each node.

Efficiency 60

Efficiency Cache C++ Performance 60

Scalegrid

FEBRUARY 8, 2024

Key Takeaways Distributed storage systems benefit organizations by enhancing data availability, fault tolerance, and system scalability, leading to cost savings from reduced hardware needs, energy consumption, and personnel. This process effectively duplicates essential parts of information to safeguard against potential loss.

Storage 130

Storage Systems Big Data Azure 130

Percona

MARCH 28, 2023

Journal It’s a process where every write operation gets written (appended) from Memory to a Journal file, AKA transaction log that exists on disk at a specific interval configured using “ journalCommitIntervalMs.” The same data, in the form of pages inside the Wiredtiger cache, are also marked dirty. wt and index-*.wt).

Hardware 90

Hardware C++ Storage Cache 90

ScaleOut Software

APRIL 22, 2020

The Solution: Distributed Caching. A widely used technology called distributed caching meets this need by storing frequently accessed data in memory on a server farm instead of within a database. It’s not enough simply to lash together a set of servers hosting a collection of in-memory caches.

Cache 52

Cache Storage Servers Database 52

ScaleOut Software

APRIL 22, 2020

The Solution: Distributed Caching. A widely used technology called distributed caching meets this need by storing frequently accessed data in memory on a server farm instead of within a database. It’s not enough simply to lash together a set of servers hosting a collection of in-memory caches.

Cache 52

Cache Storage Servers Database 52

Scalegrid

DECEMBER 21, 2023

To monitor Redis® instances effectively, collect Redis metrics focusing on cache hit ratio, memory allocated, and latency threshold. Advanced monitoring techniques enable you to identify potential issues, such as high latency, CPU utilization, command throughput, and cache hit rate before they become major problems.

Strategy 130

Strategy Monitoring Latency DevOps 130

The Morning Paper

FEBRUARY 20, 2020

Extending relational query processing with ML inference , Karanasos, CIDR’10. The vision is that data scientists use their favourite ML framework to construct a model, which together with any data pre-processing steps and library dependencies forms a model pipeline. " Query execution.

Processing 72

Processing Hardware Database Azure 72

Dynatrace

AUGUST 30, 2019

Reducing CPU Utilization to now only consume 15% of initially provisioned hardware. Missing Cache Settings – Make sure you cache resources that don’t change often on the browser or use a CDN. Missing caching layers, e.g. provide a read-only cache for static data. Missing retry and failover implementations.

Cache 195

Cache Architecture Database Government 195

The Morning Paper

MAY 12, 2019

An open-source benchmark suite for microservices and their hardware-software implications for cloud & edge systems Gan et al., Microservices fundamentally change a lot of assumptions current cloud systems are designed with, and present both opportunities and challenges when optimizing for quality of service (QoS) and utilization.

Open Source 61

Open Source Hardware Benchmarking Systems 61

Smashing Magazine

AUGUST 15, 2021

Cache Merril. In an Agile approach, a technology roadmap feeds the sprint and grooming processes, providing insight into how the product will travel from start to finish. How A Technology Roadmap Feeds The Agile Sprint And Grooming Processes. How To Develop Your Business’ Technology Roadmap. 2021-08-16T06:55:00+00:00.

Technology 139

Technology Technology Development Strategy 139

SQL Server According to Bob

DECEMBER 18, 2018

Device level flushing may have an impact on your I/O caching, read ahead or other behaviors of the storage system. FILE_FLAG_NO_BUFFERING is the Win32, CreateFile API flags and attributes setting to bypass file system cache. FILE_FLAG_NO_BUFFERING is the Win32, CreateFile API flags and attributes setting to bypass file system cache.

Servers 90

Servers Media Cache Storage 90

Alex Russell

APRIL 29, 2021

Helps media apps on the web save battery when doing video processing. Helps developers present better, more contextual options and prompts, reducing user annoyance and "prompt spam" Screen Wakelock. Important for apps that present boarding passes and QR codes for scanning, as well as and presentation apps (e.g.

Media 145

Media Games Education Engineering 145

ACM Sigarch

JULY 17, 2023

An example of a specification is the correct operation of the hardware of a microprocessor. An SDC is the worst possible outcome of a fault, as it can have an arbitrary impact on the correctness of software running on the hardware. The figure below presents a historical retrospective of the soft error problem as a timeline.

Energy 52

Energy Hardware Best Practices Architecture 52

The Morning Paper

DECEMBER 8, 2019

On the last morning of the conference Daniel Bittman presented some of the work being done in the context of the Twizzler OS project to explore new programming models for NVM. The beauty of persistent memory is that we can use memory layouts for persistent data (with some considerations for volatile caches etc. What about security?

Hardware 56

Hardware Programming Media Storage 56

Percona

JUNE 22, 2023

Defining high availability In general terms, high availability refers to the continuous operation of a system with little to no interruption to end users in the event of hardware or software failures, power outages, or other disruptions. If a primary server fails, a backup server can take over and continue to serve requests.

Availability 110

Availability Database Open Source Hardware 110

SQL Server According to Bob

JANUARY 11, 2020

​​ Because Microsoft must respond to changing market conditions, it should not be interpreted to be a commitment on the part of Microsoft, and Microsoft cannot guarantee the accuracy of any information presented after the date of publication. This cache is often supported by a battery-powered backup facility.

Servers 40

Servers Cache Media Hardware 40

Sutter's Mill

FEBRUARY 13, 2017

” This contains updated and new material that reflects the latest C++ standards and compilers, with a focus to using modern C++11/14/17 effectively on modern hardware and memory architectures. I’ll pick which one (or more) of those topics to present sometime in March.

Latency 51

Latency C++ Hardware Performance 51

Percona

APRIL 17, 2023

Make sure the drives are mounted with noatime and also if the drives are behind a RAID controller with appropriate battery-backed cache. Unfortunately, MongoDB is not NUMA-aware, and because of this, MongoDB can allocate memory unevenly, leading to the swap issue even with memory available. 25.84 - Total 21.04 25.84 - Total 21.04

Best Practices 52

Best Practices Design Tuning Database 52

Alex Russell

MARCH 6, 2021

A then-representative $200USD device had 4-8 slow (in-order, low-cache) cores, ~2GiB of RAM, and relatively slow MLC NAND flash storage. Advances in browser content processing. Hardware Past As Performance Prologue. The Moto G4 , for example. Modern network performance and availability. Content Is Dead, Long Live Content.

Performance 124

Performance Network Cache Metrics 124

SQL Server According to Bob

JANUARY 11, 2020

​​ Because Microsoft must respond to changing market conditions, it should not be interpreted to be a commitment on the part of Microsoft, and Microsoft cannot guarantee the accuracy of any information presented after the date of publication. This White Paper is for informational purposes only.

Servers 40

Servers Cache Database Media 40

SQL Server According to Bob

AUGUST 23, 2021

​​ Can be configured to use a subset of the CPUs presented by the OS from the same memory node. The decision is performance driven. ​​ A memory node represents the memory associated with a group of CPUs from the physical hardware. The scheduling node must : Remain within a single memory node.

Servers 40

Servers Azure Operating System Database 40

SQL Performance

MARCH 8, 2021

. ( MAXDOP 1 , USE HINT ( 'DISABLE_BATCH_MODE_ADAPTIVE_JOINS' ) ) ; The execution plan is ( click to enlarge ): Every operator in this plan runs in batch mode, thanks to the batch mode on rowstore Intelligent Query Processing feature in SQL Server 2019 (no columnstore index needed). Mixed execution mode plans.

Servers 95

Servers Tuning Architecture Processing 95

Smashing Magazine

AUGUST 22, 2021

This is a bit more difficult to explain, because it depends on the physical properties of the medium (for example, the used frequency of radio waves), the number of users on the network, and also the devices that interconnect different subnetworks (because they typically can only process a certain number of packets per second). Did You Know?

Performance 105

Performance Network Latency Servers 105

ACM Sigarch

NOVEMBER 1, 2019

This blog post gives a glimpse of the computer systems research papers presented at the USENIX Annual Technical Conference (ATC) 2019, with an emphasis on systems that use new hardware architectures. GAIA proposed to expand the OS page cache into accelerator memory. ATC ’19 was refreshingly different. Heterogeneous ISA.

Architecture 12

Architecture Hardware Cache Storage 12

Smashing Magazine

APRIL 29, 2021

Device Pixel Ratio (DPR) represents how a CSS pixel is translated to physical pixels on a hardware screen. Understanding the myriad of image format options out there today can be a confusing process, but you may find Cloudinary’s comparison of modern image formats helpful: There are plenty of format options for images. Large preview ).

Media 145

Media Network Metrics Mobile 145

Smashing Magazine

JANUARY 11, 2021

Build Optimizations JavaScript modules, module/nomodule pattern, tree-shaking, code-splitting, scope-hoisting, Webpack, differential serving, web worker, WebAssembly, JavaScript bundles, React, SPA, partial hydration, import on interaction, 3rd-parties, cache. In fact, choosing the right metric is a process without obvious winners.

Performance 145

Performance Cache Media Metrics 145

Smashing Magazine

JANUARY 6, 2020

So, if we created an overview of all the things we have to keep in mind when improving performance — from the very start of the process until the final release of the website — what would that list look like? Also, as Patrick Meenan suggested, it’s worth to plan out a loading sequence and trade-offs during the design process.

Performance 145

Performance Cache Network Metrics 145

Smashing Magazine

JANUARY 7, 2019

So, if we created an overview of all the things we have to keep in mind when improving performance — from the very start of the process until the final release of the website — what would that list look like? Also, as Patrick Meenan suggested, it’s worth to plan out a loading sequence and trade-offs during the design process.

Performance 103

Performance Cache Metrics Network 103