DZone

MAY 19, 2019

Even if my application runs in the cloud on the JVM, despite all of those software layers abstracting away the underlying hardware, the volatile keyword is still needed due to the cache of the processor that my software runs on. The Volatile Keyword and the Cache of Modern Processors.

Cache 136

Cache Hardware Architecture Cloud 136

Percona

SEPTEMBER 1, 2023

This results in expedited query execution, reduced resource utilization, and more efficient exploitation of the available hardware resources. This not only enhances performance but also enables you to make more efficient use of your hardware resources, potentially resulting in cost savings on infrastructure.

Tuning 52

Tuning Database Performance Hardware 52

John McCalpin

SEPTEMBER 17, 2018

Most Intel microprocessors support “HyperThreading” (Intel’s trademark for their implementation of “simultaneous multithreading”) — which allows the hardware to support (typically) two “Logical Processors” for each physical core. leaving half of the Logical Processors idle).

Hardware 40

Hardware Performance Cache Programming 40

ACM Sigarch

MAY 31, 2023

There are three common mechanisms to access remote memory: modifying applications, modifying virtual memory, and hardware-level cache coherence support. About CXL hardware availability with academia. Also, besides the hardware, we see the software ecosystem starts to appear (e.g., Using emulation (e.g.

Latency 52

Latency Hardware Cache Architecture 52

Percona

JANUARY 3, 2024

sec) Conclusion These methods provide solutions for ProxySQL backups and restores, which play a pivotal role in safeguarding the integrity of your data and providing defense against various disasters, hardware malfunctions, data loss, and corruption. Reach out to us today to schedule your instructor-led class!

Traffic 111

Traffic Hardware Cache Servers 111

Testsigma

JUNE 3, 2021

Hardware error. We focus on software so much that we forget about the hardware failures. If the hardware gets disconnected or stops working then we cannot expect correct output from the software. Example: Printers and other hardware devices return bits of information that something is not right. Hardware issues.

Software 82

Software Software Testing Hardware 82

Percona

MAY 1, 2023

Key areas include: Configuration parameter tuning : This tuning involves altering variables such as memory allocation, disk I/O settings, and concurrent connections based on specific hardware and requirements. This not only results in cost savings by minimizing hardware requirements but also has the potential to decrease cloud expenses.

Tuning 52

Tuning Efficiency Database Performance 52

Percona

JUNE 22, 2023

This includes metrics such as query execution time, the number of queries executed per second, and the utilization of query cache and adaptive hash index. query cache: Disable (query_cache_size: 0, query_cache_type:OFF) innodb_adaptive_hash_index: Check adaptive hash index usage to determine its efficiency.

Performance 106

Performance Monitoring Traffic Database 106

The Morning Paper

MARCH 8, 2020

This paper presents Snowflake design and implementation along with a discussion on how recent changes in cloud infrastructure (emerging hardware, fine-grained billing, etc.) The caching use case may be the most familiar, but in fact it’s not the primary purpose of the ephemeral storage service. joins) during query processing.

Storage 112

Storage Engineering Cache Serverless 112

Brendan Gregg

FEBRUARY 28, 2023

Make sure your system can handle next-generation DRAM,” [link] Nov 2011 - [Hruska 12] Joel Hruska, “The future of CPU scaling: Exploring options on the cutting edge,” [link] Feb 2012 - [Gregg 13] Brendan Gregg, “Blazing Performance with Flame Graphs,” [link] 2013 - [Shimpi 13] Anand Lal Shimpi, “Seagate to Ship 5TB HDD in 2014 using Shingled Magnetic (..)

Performance 110

Performance Latency Cache Virtualization 110

DZone

FEBRUARY 21, 2021

CPU consumption in Unix/Linux operating systems are studied using 8 different metrics: User CPU time , System CPU time , nice CPU time , Idle CPU time , Waiting CPU time , Hardware Interrupt CPU time , Software Interrupt CPU time , and Stolen CPU time. In this article, let's study ‘nice CPU time’. What Is ‘nice’ CPU Time?

Operating System 133

Operating System Hardware Metrics Systems 133

Scalegrid

JANUARY 5, 2024

These can be mitigated through the implementation of: efficient query optimization caching of database queries utilization of database indexes implementation of session storage employing database read replication and sharding. By implementing data abstraction techniques, these challenges can be addressed more effectively.

Efficiency 147

Efficiency Storage Database Scalability 147

CSS Wizardry

AUGUST 7, 2019

only to find that the resource they’re requesting isn’t in that PoP ’s cache. Routing: If you are using a CDN—and you should be!—a a customer in Leeds might get routed to the MAN datacentre. Accordingly, they’ll get routed all the way back to your origin server to retrieve it from there.

Latency 269

Latency Ecommerce Servers Mobile 269

HammerDB

APRIL 19, 2023

By default, HammerDB is designed to take advantage of database system caching mechanisms such as buffer caches, query caches, or statement caches. This means, HammerDB prioritizes caching the data as much as possible and pushing the CPU utilization. and 8.0.32 HammerDB 4.5 Concurrency at 80 VU’s 1.00

Performance 54

Performance Benchmarking Cache Storage 54

The Morning Paper

NOVEMBER 5, 2019

Breaking that assumption allowed Ceph to introduce a new storage backend called BlueStore with much better performance and predictability, and the ability to support the changing storage hardware landscape. But let’s take a quick look at the changing hardware landscape before we go on… The changing hardware landscape.

Storage 64

Storage Systems Hardware Efficiency 64

Percona

MAY 2, 2023

ChatGPT: The InnoDB buffer pool is used by MySQL to cache frequently accessed data in memory. If we expand the cache concept more, the buffer pool could be even less if the working set (hot data) is smaller. Questions Q: I have a MySQL server with 500 GB of RAM; my data set is 100 GB. How large my InnoDB buffer pool needs to be?

Social Media 122

Social Media Database Servers Cache 122

Scalegrid

APRIL 16, 2020

This is why our BYOC pricing is less than our Dedicated Hosting pricing, as the costs listed for BYOC are only what you pay for ScaleGrid and don’t include your hardware costs. This becomes really important for cache solutions like Redis™. Where to host your cloud database?

Cloud 242

Cloud Azure AWS Database 242

n0derunner

DECEMBER 18, 2018

In our experiment we deliberately size the active working-set to NOT fit into the metadata cache. On the same hardware with AES enabled – the time is cut in half. Additionally AES reduces the need to cache metadata in DRAM since local access is so fast. For large datasets (e.g.

Performance 40

Performance Cache Hardware Storage 40

Alex Russell

JUNE 19, 2020

Eleventy is I/O heavy, and for correctness sake, it didn't do much caching. The caches added by these changes are likely error prone and may bloat build memory for large sites. Details about build hardware, OS, and template configuration are particularly useful. Copied 1189 files / Wrote 1175 files in 5.75 MiB | 2.99

Cache 49

Cache Hardware Speed Cloud 49

SQL Performance

MAY 22, 2019

It’s one of the things we look at during a health audit, and Kimberly has a great query from her Plan cache and optimizing for adhoc workloads post that’s part of our toolkit. About 1GB of the plan cache is for prepared and procedure plans, and they only take up about 300MB worth of space. DBCC FREEPROCCACHE ; GO. EXEC dbo. [

Cache 54

Cache Performance Hardware Servers 54

CSS - Tricks

JULY 25, 2019

Cache-Headers missing? Service workers that will cache the bytecode result of a parsed and compiled script. After that, it’ll be mitigated by cache. It’s time to come to terms that your customers aren’t using the same powerful hardware as you. What changed in PageSpeed 5.0? Monitoring Time to Interactive.

Google 71

Google Engineering Speed Mobile 71

Brendan Gregg

FEBRUARY 28, 2023

Make sure your system can handle next-generation DRAM,” [link] , Nov 2011 [Hruska 12] Joel Hruska, “The future of CPU scaling: Exploring options on the cutting edge,” [link] , Feb 2012 [Gregg 13] Brendan Gregg, “Blazing Performance with Flame Graphs,” [link] , 2013 [Shimpi 13] Anand Lal Shimpi, “Seagate to Ship 5TB HDD in 2014 using Shingled Magnetic (..)

Performance 52

Performance Latency Cache Virtualization 52

Brendan Gregg

AUGUST 18, 2019

hardware Hardware counter-based instrumentation. There are also two modes visible, one between 1 and 2 milliseconds, and another between 8 and 16 milliseconds: this sounds like cache hits and cache misses. There are often two modes, one for device cache hits and one for cache misses, which can be shown by this tool.

Latency 68

Latency C++ Cache Programming 68

The Morning Paper

MAY 14, 2019

When a QoS violation is predicted to occur and a culprit microservice located, Seer uses a lower level tracing infrastructure with hardware monitoring primitives to identify the reason behind the QoS violation. E.g., in memcached there are five main internal stages, each of which has a hardware or software queue associated with it.

Big Data 45

Big Data Cloud Performance Hardware 45

ACM Sigarch

FEBRUARY 23, 2018

Hardware engineers design and implement solutions in RTL, while software engineers attempt to solve the problem either at the OS or application level. Architects were always aware of the impact speculative execution has on the performance of microarchitectural structures from branch predictors to caches.

Architecture 47

Architecture Cache Hardware Virtualization 47

All Things Distributed

SEPTEMBER 20, 2013

Not everybody agreed that the "N-ary Storage Model" (NSM) was the best approach for all workloads but it stayed dominant until hardware constraints, especially on caches, forced the community to revisit some of the alternatives.

Storage 90

Storage Hardware Cache C++ 90

Brendan Gregg

MARCH 16, 2024

Only in extreme circumstances does the cost (in processor time and I-cache footprint) translate to a tangible benefit - circumstances which usually resort to hand-coded assembly anyway. It shouldn't be 10%, unless it's cache effects. And for leaf routines (which never establish a frame), this is a non-issue.

Java 145

Java Cache Google Hardware 145

The Morning Paper

OCTOBER 4, 2020

Emerging architectures that shorten the path length, e.g. edge caching and computing, may also confine the latency. long latency and high power consumption) entail long-term co-evolution of 5G with the legacy Internet infrastructure and radio/computing hardware. Application performance. Some of these problems (e.g.

Energy 130

Energy Latency Performance Network 130

KeyCDN

JANUARY 23, 2020

A wide range of users with different operating systems, browsers, hardware configurations and other variables provides a wide sample size that helps developers discover as many issues as possible. Teams can measure the performance of all application dependencies, including databases, web services, caching, and more. Usage performance.

Strategy 72

Strategy Metrics Monitoring Servers 72

ScaleOut Software

APRIL 22, 2020

The Solution: Distributed Caching. A widely used technology called distributed caching meets this need by storing frequently accessed data in memory on a server farm instead of within a database. It’s not enough simply to lash together a set of servers hosting a collection of in-memory caches.

Cache 52

Cache Storage Servers Database 52

ScaleOut Software

APRIL 22, 2020

The Solution: Distributed Caching. A widely used technology called distributed caching meets this need by storing frequently accessed data in memory on a server farm instead of within a database. It’s not enough simply to lash together a set of servers hosting a collection of in-memory caches.

Cache 52

Cache Storage Servers Database 52

Abhishek Tiwari

DECEMBER 13, 2017

More importantly, if this works out well, this could lead to a radical improvement in performance by leveraging hardware trends such as GPUs and TPUs. They demonstrated that neural nets based learned index outperforms cache-optimized B-Tree index by up to 70% in speed while saving an order-of-magnitude in memory. Learned indexes.

Artificial Intelligence 40

Artificial Intelligence Hardware Google Benchmarking 40

Dotcom-Montior

JUNE 15, 2020

The censorship and monitoring of internet have evolved from anti-virus-like and firewall software to hardware security patches for all devices that uses internet. Every year, the Ministry of Industry and Information Technology seeks to improve the Great Firewall’s filtering and blocking techniques and enhance its algorithm.

Monitoring 52

Monitoring Performance Artificial Intelligence Internet 52

John McCalpin

DECEMBER 6, 2016

The modes that are important are: “Flat” vs “Cache” In “Flat” mode, MCDRAM memory is used as directly accessible memory, occupying the upper 16 GiB of physical address space. In “Cache” mode, MCDRAM memory is used as an L3 cache for the main DDR4 memory. numactl).

Latency 40

Latency Cache Testing Systems 40

ACM Sigarch

NOVEMBER 4, 2019

Krste Asanovic from UC Berkeley kicked off the main program sharing his experience on “ Rejuvenating Computer Architecture Research with Open-Source Hardware ”. He ended the keynote with a call to action for open hardware and tools to start the next wave of computing innovation. This year’s MICRO had three inspiring keynote talks.

Hardware 18

Hardware Architecture Programming Innovation 18

SQL Server According to Bob

JUNE 3, 2016

On the same hardware/machine repeat steps 1 thru 3 using an instance of SQL Server 2016 CTP 3.0 Note: You may need to execute the dbcc a second time so buffer cache is hot, eliminating I/O sub-system variants. Paste the script below in a new query window. Execute (ATL+X) the script and take note of the elapsed execution time.

Hardware 40

Hardware Cache Servers Software Engineering 40

The Morning Paper

DECEMBER 1, 2019

Memory might be durable, but… …it is expected that caches and registers will remain volatile. Moreover, for better performance, the processor may change the order in which writes reach the NVRAM, making it difficult for the NVRAM to even reflect a consistent prefix of the computation.

Efficiency 60

Efficiency Cache C++ Performance 60