Brendan Gregg

FEBRUARY 28, 2023

I'm now program co-chair for SREcon 2023 APAC, and our 2023 conference is June 14-16 in Singapore. And now, helping bring USENIX conferences to Australia by giving the first keynote: I could not have scripted or expected it. The call for participation ends on March 2nd 23:59 SGT!

Performance 110

Performance Latency Cache Virtualization 110

John McCalpin

AUGUST 1, 2018

According to Dr. Bandwidth, performance analysis has two recurring themes: How fast should this code (or “simple” variations on this code) run on this hardware? MPI is a commonly used standard to implement message-passing programs on computer clusters. The MPI runtime library. in ways that are seldom transparent.

Hardware 40

Hardware Transportation Performance Latency 40

The Morning Paper

DECEMBER 8, 2019

On the last morning of the conference Daniel Bittman presented some of the work being done in the context of the Twizzler OS project to explore new programming models for NVM. The starting point is a set of three asumptions for an NVM-based programming model: Compared to traditional persistent media, NVM is fast.

Hardware 56

Hardware Programming Media Storage 56

Brendan Gregg

AUGUST 18, 2019

The probe specifies what events to instrument, the filter is optional and can filter down the events based on a boolean expression, and the action is the mini program that runs. The probe is BEGIN , a special probe that runs at the beginning of the program (like awk). hardware Hardware counter-based instrumentation.

Latency 68

Latency C++ Cache Programming 68

Sutter's Mill

FEBRUARY 13, 2017

” This contains updated and new material that reflects the latest C++ standards and compilers, with a focus to using modern C++11/14/17 effectively on modern hardware and memory architectures. On April 25-27, I’ll be in Stockholm (Kista) giving a three-day seminar on “High-Performance and Low-Latency C++.”

Latency 51

Latency C++ Hardware Performance 51

The Morning Paper

FEBRUARY 20, 2020

Unlike SQL queries which are declarative, such models are expressed as imperative programs heavily dependent on libraries. Maybe in time there will be a more declarative way of specifying the model rather than trying to recover it from an imperative program. ###Cross-optimisation. categorical encoding). " Query execution.

Processing 72

Processing Hardware Database Azure 72

Alex Russell

APRIL 29, 2021

Real-time network protocols for enabling videoconferencing, desktop sharing, and game streaming applications. Modern, asynchronous network APIs that dramatically improve performance in some situations. Provides support for "unread counts", e.g. for email and chat programs. is access to hardware devices.

Media 145

Media Games Education Engineering 145

Brendan Gregg

FEBRUARY 28, 2023

I'm now program co-chair for SREcon 2023 APAC, and our 2023 conference is June 14-16 in Singapore. And now, helping bring USENIX conferences to Australia by giving the first keynote: I could not have scripted or expected it. It was a great privilege. The call for participation ends on March 2nd 23:59 SGT!

Performance 52

Performance Latency Cache Virtualization 52

SQL Server According to Bob

JANUARY 11, 2020

Stable media is commonly physical disk storage, but other devices and certain caching facilities qualify as well. Many high-end disk subsystems provide high-speed cache facilities to reduce the latency of read and write operations. This cache is often supported by a battery-powered backup facility.

Servers 40

Servers Cache Media Hardware 40

The Morning Paper

APRIL 2, 2019

That is to say, even in the presence of persistent malware e.g. in the firmware of peripheral controllers, network interface cards, disk and USB controllers, and so on, root of trust can assure us that the system has booted into a known and trusted state (or alternatively, uncover the presence of malware with high probability).

Software 40

Software Software Programming Hardware 40

ScaleOut Software

JULY 27, 2018

Looking beyond distributed caching, it’s their ability to perform data-parallel analysis that gives IMDGs such exciting capabilities. Application developers often deploy IMDGs as a distributed cache that sits between an application and its database; the IMDG offloads ephemeral data from the database.

Scalability 40

Scalability Cache Airlines Healthcare 40

ScaleOut Software

JULY 27, 2018

Looking beyond distributed caching, it’s their ability to perform data-parallel analysis that gives IMDGs such exciting capabilities. Application developers often deploy IMDGs as a distributed cache that sits between an application and its database; the IMDG offloads ephemeral data from the database.

Scalability 40

Scalability Cache Airlines Healthcare 40

The Morning Paper

SEPTEMBER 12, 2019

SQL provides a declarative programming interface, below which the system itself can figure out the most effective execution plans based on data size and statistics, layout, compute hardware etc. For the feed-forward neural network, TensorFlow using GPUs is still significantly faster with smaller hidden layers, but cannot scale.

Network 44

Network Database Programming Hardware 44

ACM Sigarch

NOVEMBER 4, 2019

The technical program, put together by program chairs Tor Aamodt and Reetuparna Das , showcased key innovations across a wide range of computer architecture topics, from domain-specific accelerators to in/near-memory computing and from security to quantum computing. . This year’s MICRO had three inspiring keynote talks. Conference.

Hardware 18

Hardware Architecture Programming Innovation 18

John McCalpin

NOVEMBER 5, 2016

In the latest (October 2016) revision of Intel’s Instruction Extensions Programming Reference , Intel has disclosed a fairly dramatic departure from these “traditional” approaches. E.g., on Haswell you can execute two loads per cycle of any size or alignment as long as neither crosses a cache-line boundary.

Cache 40

Cache C++ Latency Hardware 40

ACM Sigarch

NOVEMBER 1, 2019

This blog post gives a glimpse of the computer systems research papers presented at the USENIX Annual Technical Conference (ATC) 2019, with an emphasis on systems that use new hardware architectures. GAIA proposed to expand the OS page cache into accelerator memory. ATC ’19 was refreshingly different. Heterogeneous ISA.

Architecture 12

Architecture Hardware Cache Storage 12

The Netflix TechBlog

NOVEMBER 15, 2022

But it’s not easy: to pull this off, VFX studios need to build and operate serious technical infrastructure (compute, storage, networking, and software licensing), otherwise known as a “ render farm.” This program is just one example of the many ways Netflix strives to entertain the world.

Cloud 282

Cloud Entertainment AWS Infrastructure 282

SQL Server According to Bob

JANUARY 11, 2020

Time of Last Access The time of last access is a caching ​​ algorithm ​​ that enables ​​ cache ​​ entries to be ordered by their ​​ access times. aspx ) and ​​ Sparse Files ​​ ( [link] f ault.asp?url=/library/en-us/fileio/fs/sparse_files.asp

Servers 40

Servers Cache Database Media 40

High Scalability

NOVEMBER 25, 2019

To add elasticity, reliability and durability, these data centers are connected to Google Cloud platform using high speed, secure Google Interconnect network. Edge caching. In general, Egnyte connect architecture shards and caches data at different levels based on: Amount of data. Nginx for disk based caching.

Architecture 52

Architecture Cache Azure Storage 52