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USENIX LISA2021 Computing Performance: On the Horizon

Brendan Gregg

It's an exciting time for developments in computer performance, not just for the BPF technology (which I often [write about]) but also for processors with 3D stacking and cloud vendor CPUs (e.g.,

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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

It's an important vendor-neutral space to share the latest in technology. USENIX has been a great help to my career and my employers, and I hope it is just as helpful for you. And now, helping bring USENIX conferences to Australia by giving the first keynote: I could not have scripted or expected it.

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As-Salaam-Alaikum: The cloud arrives in the Middle East!

All Things Distributed

I'm also excited to announce today that we are launching an AWS Edge Network Location in the United Arab Emirates (UAE) in the first quarter of 2018. In the education sector we have been supporting the development of technology and cloud skills amongst tertiary institutes in the Middle East through the AWS Educate program.

Cloud 152
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Two Sessions: C++ Concurrency and Parallelism – 2012 State of the Art (and Standard)

Sutter's Mill

I’m going to put them together especially and only for C++ and Beyond 2012 , and I’ll be giving them nowhere else this year: C++ Concurrency – 2012 State of the Art (and Standard). C++ Parallelism – 2012 State of the Art (and Standard). I hope to see many of you at C&B 2012. And there’s a lot to tell. I can’t wait.

C++ 40
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Rising Tide Rents and Robber Baron Rents

O'Reilly

The answer can be found in the theory of economic rents, and in particular, in the kinds of rents that are collected by companies during different stages of the technology business cycle. Then the cycle begins again with a new class of competitors, who are forced to explore new, disruptive technologies that reset the entire market.

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A Brief Guide of xPU for AI Accelerators

ACM Sigarch

BPU: Brain Processing Unit is the design of the AI chips by Horizon Robotics. With its modular architecture, DLA is scalable, highly configurable, and designed to simplify integration and portability. The IPU design supports both training and inference, and is a memory-centric design.

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USENIX LISA2021 Computing Performance: On the Horizon

Brendan Gregg

It's an exciting time for developments in computer performance, not just for the BPF technology (which I often [write about]) but also for processors with 3D stacking and cloud vendor CPUs (e.g.,