Alex Russell

MARCH 6, 2021

TL;DR: A lot has changed since 2017 when we last estimated a global baseline resource per-page resource budget of 130-170KiB. To update our global baseline from 2017, we want to update our priors on a few dimensions: The evolved device landscape. Hardware Past As Performance Prologue. The Moto G4 , for example. Hard Reset.

Performance 124

Performance Network Cache Metrics 124

Percona

AUGUST 5, 2023

This blog was originally published in July 2017 and was updated in August 2023. If you don’t have well-designed and small columns for this composite primary key, it could enlarge all of your secondary indexes. Inappropriately designed queries may not fully utilize partitioning benefits, leading to poor performance.

Strategy 40

Strategy Storage Database Best Practices 40

Alex Russell

APRIL 29, 2021

As an engineer on a browser team, I'm privy to the blow-by-blow of various performance projects, benchmark fire drills, and the ways performance marketing (deeply) impacts engineering priorities. With each team, benchmarks lost are understood as bugs. WebGL 2 launched for other platforms on Chrome and Firefox in 2017.

Media 145

Media Games Education Engineering 145

Alex Russell

JANUARY 30, 2024

HTML, CSS, images, and fonts can all be parsed and run at near wire speeds on low-end hardware, but JavaScript is at least three times more expensive, byte-for-byte. Engineering is the discipline of designing solutions under specific constraints. So what did $650, give or take, buy in late 2017 or early 2018?

Performance 90

Performance Network Mobile Speed 90

Alex Russell

OCTOBER 22, 2017

— Alex Russell (@slightlylate) October 4, 2017. Budgets are scaled to a benchmark network & device. Deciding what benchmark to use for a performance budget is crucial. Simulated packet loss and variable latency, however, can make benchmarking extremely difficult and slow. Maybe "ambush by JS"?

Performance 68

Performance Benchmarking Network Mobile 68

John McCalpin

JANUARY 22, 2018

Introduction: In December 2017, my colleague Damon McDougall (now at AMD) asked for help in porting the fused multiply-add example code from a Colfax report ( [link] ) to the Xeon Phi x200 (Knights Landing) processors here at TACC. A peculiar throughput limitation on Intel’s Xeon Phi x200 (Knights Landing). cmpl $1000000000, %eax.

Latency 40

Latency Hardware Code Testing 40