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USENIX LISA2021 Computing Performance: On the Horizon

Brendan Gregg

It's an exciting time for developments in computer performance, not just for the BPF technology (which I often [write about]) but also for processors with 3D stacking and cloud vendor CPUs (e.g., This was a chance to talk about other things I've been working on, such as the present and future of hardware performance.

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SQL 2016 – It Just Runs Faster Announcement

SQL Server According to Bob

SQL Server 2016 ‘It Just Runs Faster’ A bold statement that any SQL Server professional can stand behind with confidence. Try SQL Server 2016 Today. In the Sep 2014 the SQL Server CSS and Development teams performed a deep dive focused on scalability and performance when running on current and new hardware configurations.

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What is chaos engineering?

Dynatrace

Chaos engineering is a method of testing distributed software that deliberately introduces failure and faulty scenarios to verify its resilience in the face of random disruptions. Practitioners subject software to a controlled, simulated crisis to test for unstable behavior. Chaos engineers ask why. The history of chaos engineering.

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Software-defined far memory in warehouse scale computers

The Morning Paper

Software-defined far memory in warehouse-scale computers Lagar-Cavilla et al., ” This paper describes a “far memory” system that has been in production deployment at Google since 2016. ” This paper describes a “far memory” system that has been in production deployment at Google since 2016.

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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

It's an important vendor-neutral space to share the latest in technology. USENIX has been a great help to my career and my employers, and I hope it is just as helpful for you. And now, helping bring USENIX conferences to Australia by giving the first keynote: I could not have scripted or expected it.

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A Brief Guide of xPU for AI Accelerators

ACM Sigarch

They introduced the architecture of coarse grain reconfigurable array (CGRA) for statically scheduled data flow computing in HOTCHIPS’17 and its software stack of compiler and linker in ICCAD’17. HPU: Holographic Processing Unit (HPU) is the specific hardware of Microsoft’s Hololens. In ISSCC’18, there were many NPU designs.

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USENIX LISA2021 Computing Performance: On the Horizon

Brendan Gregg

It's an exciting time for developments in computer performance, not just for the BPF technology (which I often [write about]) but also for processors with 3D stacking and cloud vendor CPUs (e.g., This was a chance to talk about other things I've been working on, such as the present and future of hardware performance.