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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

DDR6: Here's What to Expect in RAM Modules,” [link] Nov 2020 - [Salter 20] Jim Salter, “Western Digital releases new 18TB, 20TB EAMR drives,” [link] Jul 2020 - [Spier 20] Martin Spier, Brendan Gregg, et al.,

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SQL 2016 – It Just Runs Faster Announcement

SQL Server According to Bob

SQL Server 2016 ‘It Just Runs Faster’ A bold statement that any SQL Server professional can stand behind with confidence. Try SQL Server 2016 Today. In the Sep 2014 the SQL Server CSS and Development teams performed a deep dive focused on scalability and performance when running on current and new hardware configurations.

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SQL 2016 – It Just Runs Faster: DBCC Scales 7x Better

SQL Server According to Bob

Internally DBCC CHECK* uses a page scanning coordinator design (MultiObjectScanner.) SQL Server 2016 changes the internal design to (CheckScanner), applying no lock semantics and a design similar to those used with In-Memory Optimized (Hekaton) objects, allowing DBCC operations to scale far better than previous releases.

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The Performance Inequality Gap, 2021

Alex Russell

Back in 2016, I gave a talk outlining the causes and effects of the terrible performance of web apps built using popular tools on the fastest-growing device segment: low-end to mid-range Android phones. A then-representative $200USD device had 4-8 slow (in-order, low-cache) cores, ~2GiB of RAM, and relatively slow MLC NAND flash storage.

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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

DDR6: Here's What to Expect in RAM Modules,” [link] , Nov 2020 [Salter 20] Jim Salter, “Western Digital releases new 18TB, 20TB EAMR drives,” [link] , Jul 2020 [Spier 20] Martin Spier, Brendan Gregg, et al.,

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Progress Delayed Is Progress Denied

Alex Russell

At the time of the last Confluence run, the gap had stretched to nearly 1000 APIs, doubling since 2016. Apple's policy against browser engine choice adds years of delays beyond the (expected) delay of design iteration, specification authoring, and browser feature development. is access to hardware devices. Content Indexing.

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Intel discloses “vector+SIMD” instructions for future processors

John McCalpin

In the latest (October 2016) revision of Intel’s Instruction Extensions Programming Reference , Intel has disclosed a fairly dramatic departure from these “traditional” approaches. It is not clear that any compiler will ever use this instruction — it looks like it is designed for Kazushige Goto ‘s personal use.

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