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What is chaos engineering?

Dynatrace

Chaos engineering is a method of testing distributed software that deliberately introduces failure and faulty scenarios to verify its resilience in the face of random disruptions. Practitioners subject software to a controlled, simulated crisis to test for unstable behavior. Chaos engineers ask why. The history of chaos engineering.

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USENIX LISA2021 Computing Performance: On the Horizon

Brendan Gregg

AWS Graviton2); for memory with the arrival of DDR5 and High Bandwidth Memory (HBM) on-processor; for storage including new uses for 3D Xpoint as a 3D NAND accelerator; for networking with the rise of QUIC and eXpress Data Path (XDP); and so on. I also wrote about these topics in detail for my recent [Systems Performance 2nd Edition] book.

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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

I didn't end up getting published in SysAdmin directly, but my performance work did make it as a feature article (thanks Matty). link] 2021 - [Trader 21] Tiffany Trader, “Cerebras Second-Gen 7nm Wafer Scale Engine Doubles AI Performance Over First-Gen Chip ,” [link] Apr 2021 - [Ghigoff 21] Yoann Ghigoff, et al., "BMC:

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The Performance Inequality Gap, 2024

Alex Russell

It's time once again to update our priors regarding the global device and network situation. HTML, CSS, images, and fonts can all be parsed and run at near wire speeds on low-end hardware, but JavaScript is at least three times more expensive, byte-for-byte. What's changed since last year? and 75KiB of JavaScript.

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The Ethics of Web Performance

Tim Kadlec

Sites that use an excess of resources, whether on the network or on the device, don’t just cause slow experiences, but can leave entire groups of people out. Similarly, there is a growing gap between what a top of the line network connection can handle and what someone with a poor mobile connection or satellite connection can handle.

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USENIX LISA2021 Computing Performance: On the Horizon

Brendan Gregg

AWS Graviton2); for memory with the arrival of DDR5 and High Bandwidth Memory (HBM) on-processor; for storage including new uses for 3D Xpoint as a 3D NAND accelerator; for networking with the rise of QUIC and eXpress Data Path (XDP); and so on. I also wrote about these topics in detail for my recent [Systems Performance 2nd Edition] book.

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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

As for attending USENIX conferences: I finally started attending and speaking at them in 2010 when a community manager encouraged me to (thanks Deirdre Straughan), and since then I've met many friends and connections, including Amy who is now USENIX President, and Rikki with whom I co-chaired the USENIX LISA18 conference.