Brendan Gregg

FEBRUARY 28, 2023

This included SysAdmin magazine, which contained articles from various experts including Amy Rich, and a couple of advertisements: One was to submit your own articles to the magazine for publication (by writing to the editor, Rikki Endsley) and another was to attend USENIX conferences in the US and learn directly from the experts!

Performance 110

Performance Latency Cache Virtualization 110

Brendan Gregg

FEBRUARY 28, 2023

This included SysAdmin magazine, which contained articles from various experts including Amy Rich, and a couple of advertisements: One was to submit your own articles to the magazine for publication (by writing to the editor, Rikki Endsley) and another was to attend USENIX conferences in the US and learn directly from the experts!

Performance 52

Performance Latency Cache Virtualization 52

ACM Sigarch

MAY 31, 2023

using Compute Express Link or CXL), organizing memory components for optimal performance, adapting system software traditionally designed for homogeneous memory systems, and developing memory abstractions and programming constructs for HCM management. Therefore, software-hardware co-design is an essential component.

Latency 52

Latency Hardware Cache Architecture 52

Brendan Gregg

AUGUST 18, 2019

BPF has been extended (aka eBPF) in recent years for providing a safe way to extend kernel functionality, and has become a hot topic in systems engineering, with at least 24 talks on BPF at the last Linux Plumber's conference. The probe is BEGIN , a special probe that runs at the beginning of the program (like awk). was just released.

Latency 68

Latency C++ Cache Programming 68

ACM Sigarch

FEBRUARY 23, 2018

In industry, generally due to time-to-market restrictions, we tend to think extremely short term with evolutionary design changes rather than riskier revolutionary ideas that have a longer timeline for returns. At other times, the PC’s response is to push the paper to another conference. Discounting the Past.

Architecture 47

Architecture Cache Hardware Virtualization 47

ACM Sigarch

NOVEMBER 4, 2019

The technical program, put together by program chairs Tor Aamodt and Reetuparna Das , showcased key innovations across a wide range of computer architecture topics, from domain-specific accelerators to in/near-memory computing and from security to quantum computing. . Conference. 79 papers were accepted out of 344 submissions.

Hardware 18

Hardware Architecture Programming Innovation 18

The Morning Paper

DECEMBER 8, 2019

At the start of November I was privileged to attend HPTS (the High Performance Transaction Systems) conference in Asilomar. On the last morning of the conference Daniel Bittman presented some of the work being done in the context of the Twizzler OS project to explore new programming models for NVM.

Hardware 56

Hardware Programming Media Storage 56