VoltDB

JUNE 1, 2017

Earlier this month I spent a week at the OpenStack conference. But once you realize that there are, in fact, several OpenStack conferences happening at the same time and place, it makes more sense. Hardware Optimizers” want to get the maximum utilization out of hardware.

Hardware 40

Hardware Latency Virtualization Cloud 40

O'Reilly

JANUARY 13, 2020

Binder, she notes, “was widely used last year for teaching workshops and tutorials at many Python conferences.” Most surprisingly is the full first-class support for differentiable programming with automatic differentiation, which is made possible by Swift’s underlying compiler framework and design. ” Java.

Programming 130

Programming Java Google C++ 130

Adrian Cockcroft

JUNE 21, 2022

The early days at Sun Cambridge were special, I absorbed a lot about networking and the technical side of the role from my fellow systems engineer Martin Baines, and we were driving all over the region in cool company cars (I had a Citroen BX 16V) selling a really hot product.

Tuning 52

Tuning Benchmarking Engineering C++ 52

ACM Sigarch

NOVEMBER 4, 2019

Krste Asanovic from UC Berkeley kicked off the main program sharing his experience on “ Rejuvenating Computer Architecture Research with Open-Source Hardware ”. He ended the keynote with a call to action for open hardware and tools to start the next wave of computing innovation. Conference.

Hardware 18

Hardware Architecture Programming Innovation 18

Brendan Gregg

AUGUST 18, 2019

BPF has been extended (aka eBPF) in recent years for providing a safe way to extend kernel functionality, and has become a hot topic in systems engineering, with at least 24 talks on BPF at the last Linux Plumber's conference. hardware Hardware counter-based instrumentation. was just released. BEGIN Start of bpftrace.

Latency 68

Latency C++ Cache Programming 68

Sutter's Mill

MAY 28, 2012

There was so much interest that I formed four Study Groups and appointed chairs: the largest on concurrency and parallelism (SG1, Hans Boehm), and three others on modules (SG2, Doug Gregor), filesystem (SG3, Beman Dawes), and networking (SG4, Kyle Kloepper). This will be a broad and deep dive. At C++ and Beyond 2011, the attendees (audience!)

C++ 40

C++ Hardware Best Practices Tuning 40

The Morning Paper

DECEMBER 8, 2019

At the start of November I was privileged to attend HPTS (the High Performance Transaction Systems) conference in Asilomar. On the last morning of the conference Daniel Bittman presented some of the work being done in the context of the Twizzler OS project to explore new programming models for NVM. What about security?

Hardware 56

Hardware Programming Media Storage 56

The Morning Paper

SEPTEMBER 19, 2019

There were so many interesting papers at the conference this year though that I haven’t been able to cover nearly as many as I would like. Could it be Analyzing efficient stream processing on modern hardware ? What if the network was no longer the bottleneck? What’s their secret???

Blockchain 46

Blockchain Hardware Google Analytics 46

Smashing Magazine

AUGUST 22, 2021

As we will see, QUIC and HTTP/3 indeed have great web performance potential, but mainly for users on slow networks. If your average visitor is on a fast cabled or cellular network, they probably won’t benefit from the new protocols all that much. An often used metaphor is that of a pipe used to transport water. Congestion Control.

Performance 105

Performance Network Latency Servers 105

Adrian Cockcroft

NOVEMBER 11, 2019

Another problem is that a design control, intended to mitigate a failure mode, may not work as intended. This discussion focuses on hardware, software and operational failure modes. STPA is based on a functional control diagram of the system, and the safety constraints and requirements for each component in the design.

Latency 52

Latency Engineering Systems Hardware 52

Adrian Cockcroft

NOVEMBER 11, 2019

Another problem is that a design control, intended to mitigate a failure mode, may not work as intended. This discussion focuses on hardware, software and operational failure modes. STPA is based on a functional control diagram of the system, and the safety constraints and requirements for each component in the design.

Latency 53

Latency Engineering Systems Hardware 53

ACM Sigarch

NOVEMBER 1, 2019

This blog post gives a glimpse of the computer systems research papers presented at the USENIX Annual Technical Conference (ATC) 2019, with an emphasis on systems that use new hardware architectures. USENIX ATC is a top-tier venue with a broad range of systems research papers from both industry and academia. Heterogeneous ISA.

Architecture 12

Architecture Hardware Cache Storage 12