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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

My personal opinion is that I don't see a widespread need for more capacity given horizontal scaling and servers that can already exceed 1 Tbyte of DRAM; bandwidth is also helpful, but I'd be concerned about the increased latency for adding a hop to more memory. Ford, et al., “TCP

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USENIX SREcon APAC 2022: Computing Performance: What's on the Horizon

Brendan Gregg

My personal opinion is that I don't see a widespread need for more capacity given horizontal scaling and servers that can already exceed 1 Tbyte of DRAM; bandwidth is also helpful, but I'd be concerned about the increased latency for adding a hop to more memory. It was a great privilege. Ford, et al., “TCP

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Supercomputing Predictions: Custom CPUs, CXL3.0, and Petalith Architectures

Adrian Cockcroft

Here’s some predictions I’m making: Jack Dongarra’s efforts to highlight the low efficiency of the HPCG benchmark as an issue will influence the next generation of supercomputer architectures to optimize for sparse matrix computations. Next generation architectures will use CXL3.0 Next generation architectures will use CXL3.0

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Five Data-Loading Patterns To Improve Frontend Performance

Smashing Magazine

2022-09-27T14:00:00+00:00. 2022-09-27T16:33:12+00:00. Active Memory Caching. When you want to get data that you already had quickly, you need to do cachingcaching stores data that a user recently retrieved. Caching partially stores your data and is not used as permanent storage. Caching Schemes.

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The Performance Inequality Gap, 2023

Alex Russell

Per the 2022 Web Almanac , which pulls data from real-world devices via the CrUX dataset , today's web offers poor performance for most users. These devices feature: Eight slow, big.LITTLE ARM cores (A75+A55, or A73+A53) built on last-generation processes with very little cache. 4GiB of RAM. Qualcomm has some 'splainin to do.