Daniel Lemire

FEBRUARY 8, 2019

The division by a power of two ( / (2 N )) can be implemented as a right shift if we are working with unsigned integers, which compiles to single instruction: that is possible because the underlying hardware uses a base 2. I make my benchmarking code available. What if d is a constant, but not known to the compiler? Can we do better?

C++ 279

C++ Benchmarking Hardware Testing 279

Brendan Gregg

MARCH 16, 2024

This technique saves two instructions in the prologue and epilogue and makes one additional general-purpose register (%rbp) available." 2005-2023: The winter of broken profilers However, the change was then applied to x86-64 (64-bit) as well, which had sixteen registers and didn't benefit so much from a seventeenth.

Java 145

Java Cache Google Hardware 145

SQL Server According to Bob

JANUARY 11, 2020

Copyright The information ​​ that is contained ​​ in this document represents the current view of Microsoft Corporation on the issues discussed as of the date of publication.

Servers 40

Servers Cache Database Media 40

SQL Server According to Bob

DECEMBER 18, 2018

CSA ISO/IEC 9945-1:2005 (R2009) 3.375 Synchronized I/O Data Integrity Completion. Refer to the ISO documentation on file integrity for complete details: CSA ISO/IEC 9945-1:2005 (R2009) 3.376 Synchronized I/O File Integrity Completion. Linux may need similar utilities to control various hardware cache installations. Device Flush.

Servers 90

Servers Media Cache Storage 90

Brendan Gregg

AUGUST 8, 2017

The oldest change in the entire Linux repo dates back to 2005, when Linus imported Linux 2.6.12-rc2, 90491 N|rnberg (Germany) Consulting+Networking+Programming+etc'ing 42. This, too, was a dead end. rc2, and this change predates that. He mentions major changes, but not the load average change. Yes, I'd say so. They aren't idle.

Latency 111

Latency Metrics C++ Systems 111