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5.5 mm in 1.25 nanoseconds

Randon ASCII

In 2004 I was working for Microsoft in the Xbox group, and a new console was being created. The Xbox 360 CPU had three PowerPC cores and a 1 MB L2 cache and these features are clearly visible on the wafer. I used to know what the visible elements of the CPU cores were (L1 caches? To the left of that is one of the CPU cores.

Cache 126
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The Return of the Frame Pointers

Brendan Gregg

As my former Sun Microsystems colleague Eric Schrock (nickname Schrock) wrote in November 2004 : "On i386, you at least had the advantage of increasing the number of usable registers by 20%. This technique saves two instructions in the prologue and epilogue and makes one additional general-purpose register (%rbp) available."

Java 145
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SQL Server I/O Basics Chapter #1

SQL Server According to Bob

Microsoft SQL Server I/O Basics Author: ​​ Bob Dorr, Microsoft SQL Server Escalation Published: ​​ December, 2004 SUMMARY: ​​ Learn the I/O requirements for Microsoft SQL Server database file operations. © ​​ 2004 Microsoft Corporation. ​​ All rights reserved.

Servers 40
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SQL Server I/O Basics Chapter #2

SQL Server According to Bob

Time of Last Access The time of last access is a caching ​​ algorithm ​​ that enables ​​ cache ​​ entries to be ordered by their ​​ access times.

Servers 40